A computing system may include a memory for storing instructions and variables of software executing on the computing system. Access to data stored in a memory may be provided via a memory interface, such as a double data rate (DDR) interface. Providing high performance for the software executing on the computer system may require that data is transferred through the memory interface at a high bandwidth, and providing high bandwidth may require that the data is transferred through the memory interface at a high data rate. For a DDR interface, a high data rate is provided in part by transferring the data at rate that is twice the rate of control signals, such as the addressing signals of the memory.
For a high data rate, data being transferred through the DDR interface may be valid for a brief period of time. To successfully transfer the data from a source through the DDR interface to a destination, the data may need to be sampled at the destination during the brief period of time in which the data is valid at the destination. For a read from memory, the source may be the memory and the destination may be a memory controller for a processor of the computing system, and for a write to memory, the source may be a memory controller and the destination may be the memory.
Precise control of the write timing for writing data to the memory and precise control of the read timing for reading data from memory may be necessary to transfer data to and from the memory at a high data rate. Various factors may affect the write timing and the read timing, for example, fluctuations in fabrication processes used to manufacture the memory and memory controller, variations in the printed circuit board or boards connecting the memory controller with the memory, variations in the voltages of the power supply or supplies of the memory controller and the memory, and variations in temperature including variations in the ambient temperature of the computing system. These process, voltage, and temperature variations may cause a particular setting of write and read timings, which is functional for one combination of process, voltage, and temperature, to fail for another combination of process, voltage, and temperature.